Bootblock
CPU init, cache as RAM (CAR), microcode load
Memory device detection and initialization (part of FSP -> Firmware Support Package)
Post Memory Init
Device detection, initialization and resource allocation
Interrupt configuration (APIC, XAPIC, etc)
MPInit
AP initialization, APIC id assignment, MPtable generation
SIPI messages, SMM setup, relocation, handling, etc
Code execution on specific cores/threads/sockets
RAS
Memory RAS (ECC errors, parity, scrubbing)
PCIE AER (advanced error reporting)
Error injection, logging, and handling (recovery, EINJ)
ACPI
Table creation, loading of ACPI memory
General purpose event handling in ASL
Power Management (with integration to SMI’s)
Experienced
20 years of BIOS experience (Coreboot, AMI, Phoenix, UEFI) on x86 server and client
Firmware for various types of controllers
Manageability engine, Integrated Sensor Hub, special purpose embedded systems (ARC, MSP, Raspberry PI)